Aspects of semiconductor technology have focused on obtaining highly integrated semiconductor devices. As semiconductor devices become more highly integrated, a plurality of MOS transistors may be formed on and/or over a single wafer. The MOS transistors may be isolated using isolation layers. These isolation layers may have a shallow trench insulation (STI) structure or a local oxidation of silicon (LOCOS) structure.
As illustrated in example FIG. 1, a semiconductor device may include a plurality of transistors 52 formed in semiconductor substrate 50. Isolation layers having STI structures 51 may be formed between transistors 52.
In order to form STI structure 51, a nitride layer and a photoresist pattern may be formed on and/or over substrate 50. The nitride layer may be dry etched using the photoresist pattern as an etch mask and substrate 50 may be etched using the nitride layer as an etch mask. An oxide layer may be deposited on and/or over trenches and substrate 50. The oxide layer and the nitride layer formed over substrate 50 may then be removed using a chemical mechanical polishing (CMP) process to thereby form STI structures 51. Therefore, a field region, i.e., an isolation region and an active region where a MOS transistor will be formed, may be separated from each other. A MOS transistor formation process may then be performed to form MOS transistors.
However, if transistors 52 are isolated using STI structures 51, additional isolation regions in which STI structures 51 will be formed have to be prepared. When fabricating such transistors it may become difficult to reduce source/drain resistance. Moreover, the characteristics of the semiconductor device may become degraded due to stress caused by the STI structure process. Even still, since STI structures 51 may be formed using CMP, divots “A” may be generated at the edges of STI structures 51. Divots “A” may cause a hump phenomenon and an inverse narrow width effect (INWE), so that semiconductor devices may operate abnormally. Yet and still, it may become difficult to control current leakage due to the STI structure edge portions.